| _2025-05-23_15：57：08_ | 2025-05-23 15：57：08 | | 11. TPH Support — The Linux Kernel documentation | | 原文链接失效了?试试备份 | | TAGs:设备与驱动 PCI_PCIe TPH | | Summary: The Linux Kernel's 6.15.0-rc7 documentation introduces TPH (TLP Processing Hints), a PCIe feature that enables endpoint devices to provide optimization hints for memory space requests. These hints, called Steering Tags (STs), are embedded in the requester's TLP headers, allowing the system hardware to manage resources more efficiently. To use TPH, the Linux kernel must be built with the CONFIG_PCIE_TPH option, and the driver must enable and manage TPH support using provided APIs. The driver can retrieve and write Steering Tags for target memories associated with specific CPUs. TPH is optional and can be enabled or disabled system-wide using the "notph" kernel command line option.Linux 内核的 6.15.0-rc7 文档介绍了 TPH（TLP 处理提示），这是一项 PCIe 功能，使端点设备能够为内存空间请求提供优化提示。这些提示称为转向标签 （ST），嵌入在请求者的 TLP 标头中，使系统硬件能够更有效地管理资源。要使用 TPH，必须使用 CONFIG_PCIE_TPH 选项构建 Linux 内核，并且驱动程序必须使用提供的 API 启用和管理 TPH 支持。驾驶员可以检索和写入与特定 CPU 关联的目标内存的转向标签。TPH 是可选的，可以使用 “notph” 内核命令行选项在系统范围内启用或禁用。 | |
| _2025-05-23_11：57：30_ | 2025-05-23 11：57：30 | | Intel® Data Direct I_O Technology | | 原文链接失效了?试试备份 | | TAGs:设备与驱动 PCI_PCIe cache direct injection | | Summary: Intel Data Direct I/O Technology (Intel DDIO) is a feature introduced with the Intel Xeon processor E5 and E7 v2 families that allows Intel Ethernet Controllers and adapters to communicate directly with the processor cache, increasing bandwidth, reducing latency, and decreasing power consumption. This is achieved by making the processor cache the primary destination and source of I/O data instead of the traditional method of going through main memory first. Intel DDIO is enabled by default on all Intel Xeon processor E5 and E7 v2 family platforms and benefits all I/O devices, including Ethernet, InfiniBand, Fibre Channel, and RAID. The technology provides significant performance benefits for I/O-bound workloads and reduced power consumption for non-IO-bound workloads. Intel Ethernet products, with their high-performing, stateless architecture, take advantage of the improvements in communication between host and network controller that Intel DDIO provides.英特尔 Data Direct I/O 技术（英特尔 DDIO）是英特尔至强处理器 E5 和 E7 v2 系列中引入的一项功能，允许英特尔以太网控制器和适配器直接与处理器缓存通信，从而增加带宽、减少延迟并降低功耗。这是通过使处理器高速缓存成为 I/O 数据的主要目标和来源来实现的，而不是首先通过主内存的传统方法。英特尔 DDIO 在所有英特尔至强处理器 E5 和 E7 v2 系列平台上默认启用，并受益于所有 I/O 设备，包括以太网、InfiniBand、光纤通道和 RAID。该技术为 I/O 密集型工作负载提供了显著的性能优势，并降低了非 IO 密集型工作负载的功耗。英特尔以太网产品具有高性能、无状态架构，利用了英特尔 DDIO 提供的主机和网络控制器之间通信的改进。 | |
| _2025-05-23_11：54：23_ | 2025-05-23 11：54：23 | | TPH and cache direct injection support [LWN.net] | | 原文链接失效了?试试备份 | | TAGs:设备与驱动 PCI_PCIe cache direct injection | | Summary: A patch series is proposed for adding TPH (TLP Processing Hints) support in Linux, which is a PCIe feature that allows endpoint devices to provide optimization hints for memory space requests. The new Cache Injection feature leverages TPH and allows PCIe endpoints to inject I/O Coherent DMA writes directly into an L2 cache. This results in memory bandwidth savings and better network performance for applications requiring high performance and low latency, such as networking and storage applications. The patch series includes changes to various Linux kernel files and drivers, specifically the Broadcom BNXT driver, and addresses compilation warnings and errors.提出了一个补丁系列，用于在 Linux 中添加 TPH（TLP 处理提示）支持，这是一项 PCIe 功能，允许端点设备为内存空间请求提供优化提示。新的高速缓存注入功能利用 TPH，并允许 PCIe 端点将 I/O 一致性 DMA 写入直接注入 L2 高速缓存。这可为需要高性能和低延迟的应用程序（如网络和存储应用程序）节省内存带宽并提高网络性能。此补丁系列包括对各种 Linux 内核文件和驱动程序（特别是 Broadcom BNXT 驱动程序）的更改，并解决了编译警告和错误。 | |
| _2025-05-23_16：55：05_ | 2025-05-23 16：55：05 | | PCIe的流量控制 - 知乎 | | 原文链接失效了?试试备份 | | TAGs:设备与驱动 PCI_PCIe 流控 | | Summary: PCIe's Flow Control is a mechanism in the Data Link Layer that ensures the receiving Transaction Layer has the capacity to receive Transmission Line Packets (TLPs). The Flow Control process involves regular exchange of credit information between the Data Link Layers of the communicating devices. Each device's Buffer capacity is represented in credits, with one credit equating to 4DW of TLP Payload or one TLP Header. The devices exchange Flow Control DLLPs, which carry the latest credit information, to manage the flow of TLPs towards the Data Link Layer. The interval between these credit updates is crucial, as a long interval may leave the buffer empty but prevent the sending of new TLPs, while a short interval may consume significant bandwidth and reduce overall utilization.PCIe 的流控制是数据链路层中的一种机制，可确保接收事务层具有接收传输线数据包 （TLP） 的能力。流控制过程涉及通信设备的数据链路层之间的定期信用信息交换。每个设备的缓冲区容量以积分表示，一个积分等于 4DW 的 TLP 有效载荷或一个 TLP 标头。这些设备交换流控制 DLLP，这些 DLLP 携带最新的信用信息，以管理 TLP 流向数据链路层。这些信用更新之间的间隔至关重要，因为较长的间隔可能会使缓冲区为空，但会阻止发送新的 TLP，而较短的间隔可能会消耗大量带宽并降低整体利用率。 | |