_2025-03-28_10:29:49_2025-03-28 10:29:49
Google AI芯片TPU核心架构--脉动阵列Systolic Array - 知乎
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TAGs:处理器 AI
Summary: Google's TPU (Tensor Processing Unit) is a specialized chip designed for artificial intelligence applications, with its core component being the "Matrix Multiply Unit." This unit uses a Systolic Array, a pulsing array, to enhance the speed and power efficiency of AI tasks, particularly in regards to convolution and matrix multiplication. The Systolic Array in TPU's architecture is the main focus, which is built around this matrix multiplication unit. It is accompanied by other data units like Unified Buffer and Weight FIFO, as well as activation pooling calculation units.
_2025-07-16_16:40:46_2025-07-16 16:40:46
Esperanto’s ET-SoC-1 Chip Integrates more than 1000 RISC-V Cores for Energy Efficient ML Recommendation – VLSIFacts
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TAGs:处理器 risc-v AI
Summary:
_2025-08-14_11:38:44_2025-08-14 11:38:44
Jim Keller:使用RISC-V构建AI —— 61DAC Keynote_哔哩哔哩_bilibili
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TAGs:处理器 risc-v AI
Summary:
_2025-10-14_11:43:54_2025-10-14 11:43:54
[PATCH v3 0_8] RISC-V_ Add support for Tenstorrent Blackhole SoC - Drew Fustini
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TAGs:处理器 risc-v AI tenstorrent
Summary:
_2025_1_10_12:03:31_2025_1_10 12:03:31
计算机虚拟化研究报告 - 豆包
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TAGs:虚拟化 综述 AI
saved date: Fri Jan 10 2025 12:03:31 GMT+0800 (中国标准时间)
_2026-03-13_14:30:37_2026-03-13 14:30:37
AI 是一块“五层蛋糕” _ NVIDIA 英伟达博客
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TAGs:AI
Summary: 英伟达CEO黄仁勋提出AI不是单一应用或模型,而是如同电力和互联网的基础设施。他将AI架构分为五层:能源(底层基础)、芯片(高效计算)、基础设施(AI工厂)、模型(理解多领域信息)和应用(产生经济价值)。这一架构表明AI正在重塑能源消耗、工厂建设、工作组织和经济增长方式,成为现代世界不可或缺的基础设施。